Memory devices, such as MRAM devices, are described that comprise memory elements for storing data and configuration logic for programming memory elements using a two phase boost. The memory devices perform the two phase boosting to program anti-parallel data values during a first programming phase and to program parallel data values during a second programming phase that is subsequent to the first programming phase. The voltage boost is provided by a high percentage of memory elements in a memory device by simultaneously transitioning the source line of the memory elements from a reference voltage to a source voltage during the first programming phase to effectively double the activation voltage for gates of transistors in the memory elements to program anti-parallel data values. Methods are also described for programming memory elements using a two phase boost.