- Patent Title: Method for pinning data in large cache in multi-level memory system
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Application No.: US13976181Application Date: 2013-03-15
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Publication No.: US09645942B2Publication Date: 2017-05-09
- Inventor: Ferad Zyulkyarov , Nevin Hyuseinova , Qiong Cai , Blas Cuesta , Serkan Ozdemir , Marios Nicolaides
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- International Application: PCT/US2013/032474 WO 20130315
- International Announcement: WO2014/143036 WO 20140918
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/1045 ; G06F12/0897 ; G06F12/126 ; G06F12/0895

Abstract:
A method to request memory from a far memory cache and implement, at an operating system (OS) level, a fully associative cache on the requested memory. The method includes pinning the working set of a program into the requested memory (pin buffer) so that it is not evicted due to cache conflicts and is served from the fast cache and not the slower next level memory. The requested memory extends the physical address space and is visible to and managed by the OS. The OS has the ability to make the requested memory visible to the user programs. The OS has the ability to manage the requested memory from the far memory cache as both a fully associative cache and a set associative cache.
Public/Granted literature
- US20150227469A1 Method For Pinning Data In Large Cache In Multi-Level Memory System Public/Granted day:2015-08-13
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