Invention Grant
- Patent Title: CMOS device with reading circuit
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Application No.: US14568966Application Date: 2014-12-12
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Publication No.: US09640228B2Publication Date: 2017-05-02
- Inventor: Dimitris P. Ioannou , Chandrasekharan Kothandaraman
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Roberts Mlotskowski Safran Cole & Calderon, P.C.
- Agent Anthony Canale; Andrew M. Calderon
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G11C7/04 ; G11C7/24 ; G11C11/412 ; H01L29/78 ; G11C16/10 ; G06F9/30 ; H01L29/423

Abstract:
Methods and devices for providing unclonable chip identification are provided. An integrated circuit device includes: a first transistor having a first gate oxide thickness; a second transistor having a second gate oxide thickness different than the first gate oxide thickness; and a reading circuit connected to the first transistor and the second transistor, wherein the reading circuit reads a difference in threshold voltage between the first transistor and the second transistor.
Public/Granted literature
- US20160172011A1 CMOS TRANSISTOR BIAS TEMPERATURE INSTABILITY BASED CHIP IDENTIFIER Public/Granted day:2016-06-16
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