• Patent Title: Logic circuit emulator and control method therefor
  • Application No.: US13643604
    Application Date: 2011-04-26
  • Publication No.: US09639639B2
    Publication Date: 2017-05-02
  • Inventor: Noriaki Suzuki
  • Applicant: Noriaki Suzuki
  • Applicant Address: JP Tokyo
  • Assignee: NEC CORPORATION
  • Current Assignee: NEC CORPORATION
  • Current Assignee Address: JP Tokyo
  • Priority: JP2010-101910 20100427
  • International Application: PCT/JP2011/060148 WO 20110426
  • International Announcement: WO2011/136212 WO 20111103
  • Main IPC: G06F17/50
  • IPC: G06F17/50 G06F11/26 H03K19/177
Logic circuit emulator and control method therefor
Abstract:
A logic circuit emulator comprises multiple sub-systems, in which each sub-system outputs to another one of the sub-systems a permission notification to permit the another sub-system to proceed to next emulation clock cycle depending on whether or not the state of an own sub-circuit has advanced. In case a signal that is output from an own sub-circuit and that is to be sent to a sub-circuit of the other sub-system has changed, each sub-system outputs a transfer request to transfer the signal to the another sub-system before the next emulation clock cycle. In case a signal is not being sent from the own sub-circuit to the sub-circuit of the another sub-system, and a permission notification is received but no transfer request is being received from the other sub-system, a clock signal is output for the own sub-circuit to advance the own sub-circuit to the next emulation clock cycle.
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