Invention Grant
- Patent Title: Method and structure for a large-grain high-K dielectric
- Patent Title (中): 大晶粒高K电介质的方法和结构
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Application No.: US14576537Application Date: 2014-12-19
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Publication No.: US09590063B2Publication Date: 2017-03-07
- Inventor: Rama I. Hegde
- Applicant: FREESCALE SEMICONDUCTOR, INC.
- Applicant Address: US TX Austin
- Assignee: NXP USA, INC.
- Current Assignee: NXP USA, INC.
- Current Assignee Address: US TX Austin
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L29/423 ; H01L29/51 ; H01L21/02 ; H01L21/285 ; H01L21/28
Abstract:
A method of forming a semiconductor device (100) includes depositing a metal oxide (104) over the substrate (102). The depositing includes combining a first metal and oxygen to form the metal oxide having grains and further adding a catalyst during the combining. The catalyst causes the grains to be bigger than would occur in the absence of the catalyst. A conductive layer (202) is formed over the metal oxide.
Public/Granted literature
- US20160181158A1 METHOD AND STRUCTURE FOR A LARGE-GRAIN HIGH-K DIELECTRIC Public/Granted day:2016-06-23
Information query
IPC分类:
