Invention Grant
- Patent Title: Flip chip stacking utilizing interposer
- Patent Title (中): 使用插入片的倒装芯片堆叠
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Application No.: US13853232Application Date: 2013-03-29
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Publication No.: US09589913B1Publication Date: 2017-03-07
- Inventor: Sarah M. Shepard , Bret W. Simon , Alan P. Boone
- Applicant: Rockwell Collins, Inc.
- Applicant Address: US IA Cedar Rapids
- Assignee: Rockwell Collins, Inc.
- Current Assignee: Rockwell Collins, Inc.
- Current Assignee Address: US IA Cedar Rapids
- Agent Angel N. Gerdzhikov; Donna P. Suchy; Daniel M. Barbieri
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/00 ; H01L21/82 ; H05K1/18 ; H01L25/065

Abstract:
An interposer and a method for stacking dies utilizing such an interposer in an integrated circuit are disclosed. The interposer includes a substrate and a plurality of vias defined in the substrate. At least one of the plurality of vias of the interposer is positioned to establish a connection with at least one of the plurality of vias of a first die. At least one additional die is positioned to establish a connection with the first die utilizing the connection established between the interposer and the first die through at least one of the vias.
Information query
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