Invention Grant
- Patent Title: Device including test circuit
- Patent Title (中): 设备包括测试电路
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Application No.: US14613560Application Date: 2015-02-04
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Publication No.: US09588172B2Publication Date: 2017-03-07
- Inventor: Yoshiyuki Kurokawa
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2014-022542 20140207
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
Provided is a device capable of generating test patterns even after the design stage. The area of a circuit which is included in the device and unnecessary during normal operation can be reduced. The device includes a first circuit and a second circuit. The second circuit includes a plurality of third circuits, a plurality of fourth circuits, and a fifth circuit and has a function of generating a signal for testing operation of the first circuit and a function of operating as part of the first circuit. The fourth circuit has a function of storing a first data and a function of storing a second data. The fifth circuit has a function of writing the first data to the plurality of fourth circuits, a function of writing the second data to the plurality of fourth circuits, and a function of reading the second data from the plurality of fourth circuits.
Public/Granted literature
- US20150226791A1 DEVICE Public/Granted day:2015-08-13
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