Invention Grant
US09564352B2 Method for fabricating semiconductor device including isolation layer
有权
用于制造包括隔离层的半导体器件的方法
- Patent Title: Method for fabricating semiconductor device including isolation layer
- Patent Title (中): 用于制造包括隔离层的半导体器件的方法
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Application No.: US14626567Application Date: 2015-02-19
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Publication No.: US09564352B2Publication Date: 2017-02-07
- Inventor: Jae-Soo Kim , Hyung-Kyun Kim
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2012-0143247 20121211
- Main IPC: H01L27/04
- IPC: H01L27/04 ; H01L21/762 ; H01L27/108 ; H01L21/76 ; H01L27/12 ; H01L29/06 ; H01L21/02
Abstract:
A semiconductor device includes a first isolation layer formed in a trench in a substrate. The isolation layer includes a first oxide layer formed in the trench and a second oxide layer formed over the first oxide layer, wherein the first oxide layer and the second oxide layer have a same composition.
Public/Granted literature
- US20150162237A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2015-06-11
Information query
IPC分类:
