Invention Grant
- Patent Title: Computing architecture for operating on sequential data
- Patent Title (中): 用于在顺序数据上运行的计算架构
-
Application No.: US14071465Application Date: 2013-11-04
-
Publication No.: US09563599B2Publication Date: 2017-02-07
- Inventor: David Follett , Pamela L. Follett
- Applicant: David Follett , Pamela L. Follett
- Applicant Address: US MA Concord
- Assignee: Lewis Rhodes Labs, Inc.
- Current Assignee: Lewis Rhodes Labs, Inc.
- Current Assignee Address: US MA Concord
- Agency: Sunstein Kann Murphy & Timbers LLP
- Main IPC: G06F15/76
- IPC: G06F15/76 ; G06F9/00 ; G06F15/82 ; G06F15/80

Abstract:
A data stream processing unit (DPU) and method for use are provided. A DPU includes a number of processing elements arranged in a sequence, and each datum in the data stream visits each processing element in sequence. Each processing element has a memory circuit, data and metadata input and output channels, and a computing circuit. The metadata input represents a partial computational state that is associated with each datum as it passes through the DPU. The computing circuit for each processing element operates on the data and metadata inputs as a function of its position in the sequence, producing an altered partial computational state that accompanies the datum. Each computing circuit may be modeled, for example, as a finite state machine, and the collection of processing elements cooperate to perform the computation. The computing circuits may be collectively programmed to perform any desired computation.
Public/Granted literature
- US20150127925A1 Computing Architecture for Operating on Sequential Data Public/Granted day:2015-05-07
Information query