Invention Grant
US09536872B2 Shallow trench isolation area having buried capacitor 有权
浅沟槽隔离区有埋电容

Shallow trench isolation area having buried capacitor
Abstract:
A semiconductor chip includes a substrate including a surface, an active transistor region and a substrate contact region formed on the substrate, a shallow trench isolation (STI) area formed in the surface and disposed at least partially between the active transistor region and the substrate contact region, and at least one capacitor at least partially buried in the STI area.
Public/Granted literature
Information query
Patent Agency Ranking
0/0