Invention Grant
- Patent Title: Test method of semiconductor device
- Patent Title (中): 半导体器件的测试方法
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Application No.: US15082431Application Date: 2016-03-28
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Publication No.: US09536627B2Publication Date: 2017-01-03
- Inventor: Tomoaki Atsumi , Shuhei Nagatsuka , Kazuaki Ohshima
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2015-068921 20150330
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/24 ; G11C29/50 ; G11C11/22

Abstract:
The semiconductor device includes a bit line, a transistor, a retention node, and a capacitor. The transistor has a function of charging or discharging the retention node. The capacitor has a function of retaining a potential of the retention node. A voltage greater than the sum of a writing voltage and a threshold voltage is applied to a gate of the transistor. When the transistor is turned on, a first potential is supplied to the bit line with a reference potential in a floating state. A voltage less than the sum of the writing voltage and the threshold voltage is applied to the gate of the transistor. When the transistor is turned on, a second potential is supplied to the bit line with a reference potential in a floating state. With use of the first and second potentials, the threshold voltage of the transistor is calculated without being influenced by parasitic capacitance and variations in the storage capacitance of the capacitor.
Public/Granted literature
- US20160293276A1 TEST METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2016-10-06
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