Invention Grant
- Patent Title: Chip on film package including distributed via plugs
- Patent Title (中): 片上封装包括分布式插头
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Application No.: US14259200Application Date: 2014-04-23
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Publication No.: US09437526B2Publication Date: 2016-09-06
- Inventor: So-Young Lim , Na-Rae Shin , Jeong-Kyu Ha , Kyoung-Suk Yang , Pa-Lan Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2013-0050907 20130506
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/495 ; H01L23/482 ; H05K1/11 ; H01L23/00

Abstract:
A chip on film (COF) package includes a film substrate, first leads on a first surface of the film substrate, the first leads having a first length, and second leads on the first surface of the film substrate, the second leads having a second length larger than the first length, first via plugs penetrating the film substrate and connected to first ends of the first leads, and second via plugs penetrating the film substrate and connected to first ends of the second leads, and first connection leads on a second surface of the film substrate facing the first surface, the first connection leads having first ends connected to the first via plugs, and second connection leads on the second surface of the film substrate, the second connection leads having first ends electrically connected to the second via plugs.
Public/Granted literature
- US20140327148A1 CHIP ON FILM PACKAGE INCLUDING DISTRIBUTED VIA PLUGS Public/Granted day:2014-11-06
Information query
IPC分类: