Invention Grant
- Patent Title: Chip-embedded packages with backside die connection
- Patent Title (中): 芯片嵌入式封装,背面裸片连接
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Application No.: US14149392Application Date: 2014-01-07
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Publication No.: US09437516B2Publication Date: 2016-09-06
- Inventor: Ralf Otremba , Josef Höglauer , Manfred Schindler , Johannes Lodermeyer , Thorsten Scharf
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/367 ; H01L23/495 ; H01L23/492 ; H01L23/538 ; H01L21/48

Abstract:
A semiconductor package includes a semiconductor die and a metal clip. In one embodiment, the semiconductor die is embedded in an insulating material and has a first surface facing in a first direction, a second surface facing in a second direction opposite the first direction and an edge extending between the first and second surfaces. The metal clip is embedded in the insulating material above the die and bonded to the second surface of the die. Part of the metal clip extends laterally beyond the edge of the die and vertically in the first direction to provide galvanic redistribution at the second surface of the die. Other embodiments of semiconductor packages are also provided.
Public/Granted literature
- US20150194362A1 Chip-Embedded Packages with Backside Die Connection Public/Granted day:2015-07-09
Information query
IPC分类: