Invention Grant
- Patent Title: Method for forming spacers for a transistor gate
- Patent Title (中): 用于形成用于晶体管栅极的间隔物的方法
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Application No.: US14551849Application Date: 2014-11-24
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Publication No.: US09437418B2Publication Date: 2016-09-06
- Inventor: Nicolas Posseme
- Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
- Applicant Address: FR Paris
- Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Current Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Current Assignee Address: FR Paris
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P
- Priority: FR1361585 20131125
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L21/02 ; H01L21/8234 ; H01L21/84 ; H01L29/66 ; H01L29/78 ; H01L29/423 ; H01L29/417

Abstract:
A method for forming spacers of a transistor gate having an active layer surmounted by the gate, including forming a porous layer covering the gate and having a dielectric constant equal to or less than that of silicon oxide, forming a protective layer covering the porous layer and the gate, etching the protective layer anisotropically to preserve residual portions of the protective gate only at the flanks of the gate, forming a modified layer by penetration of ions within the porous layer anisotropically to modify the porous layer over its entire thickness above the gate and above the active layer and so as not to modify the entire thickness of the porous layer on the flanks of the gate, the latter being protected by protective spacers constituting porous spacers, and removing the modified layer by etching to leave the protective spacers in place.
Public/Granted literature
- US20150162190A1 METHOD FOR FORMING SPACERS FOR A TRANSISTOR GATE Public/Granted day:2015-06-11
Information query
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