Invention Grant
- Patent Title: Layer alignment in FinFET fabrication
- Patent Title (中): FinFET制造中的层对准
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Application No.: US13912936Application Date: 2013-06-07
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Publication No.: US09437415B2Publication Date: 2016-09-06
- Inventor: Ming-Feng Shieh , Kuei-Liang Lu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/84 ; H01L23/544 ; H01L21/308 ; H01L21/8234

Abstract:
Methods for aligning layers more accurately for FinFETs fabrication. An embodiment method includes forming a first pattern in a workpiece using a first photomask, forming a second pattern in the workpiece using a second photomask, the second photomask aligned to the first pattern, and aligning a third pattern to the first and the second patterns by aligning a first feature of the third pattern to a first feature of the first pattern in a first direction, and aligning a second feature of the third pattern to a first feature of the second pattern in a second direction orthogonal to the first direction.
Public/Granted literature
- US20130273750A1 Layer Alignment in FinFET Fabrication Public/Granted day:2013-10-17
Information query
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