Invention Grant
US09437296B2 Three-dimensional resistive memory device with adjustable voltage biasing 有权
具有可调电压偏置的三维电阻式存储器件

Three-dimensional resistive memory device with adjustable voltage biasing
Abstract:
A semiconductor memory device according to an embodiment includes a memory cell array and a control circuit. The memory cell array includes: a plurality of first conductive layers that are stacked; a memory layer provided on a side surface of the plurality of the first conductive layers; and a second conductive layer that contacts the side surface of the plurality of the first conductive layers via the memory layer. A thickness of the first conductive layer disposed at the first position is larger than a thickness of the first conductive layer disposed at the second position. The control circuit is configured to apply a first voltage to a selected first conductive layer. The control circuit changes a value of the first voltage based on a position of the selected first conductive layer.
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