Invention Grant
US09437261B2 Memory controller and information processing device 有权
内存控制器和信息处理设备

Memory controller and information processing device
Abstract:
A memory controller has a first variable delay circuit that delays a data strobe signal received from a memory, and a second variable delay circuit that variably delays a data signal which is received from the memory and is synchronous with the data strobe signal, and that is set a second delay amount which is different from a first delay amount of the first variable delay circuit.
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