An array substrate and a display are provided, and the array substrate includes: a substrate; a pixel region, provided on the substrate; a plurality of data lines, formed on the substrate; a plurality of gate signal lines, formed on the substrate and configured to apply a gate signal; a plurality of pixel units, located in the pixel region and defined by crossing of the plurality of data lines and the plurality of gate signal lines; and at least one leading wire, provided at the periphery of the pixel region and configured to transmit the gate signal, wherein two ends of each of the plurality of gate signal lines near the periphery of the pixel region are connected with one leading wire through a first thin film transistor and a second thin film transistor respectively.