Invention Grant
- Patent Title: Network-on-chip architecture for multi-processor SoC designs
- Patent Title (中): 多处理器SoC设计的网络片上架构
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Application No.: US13897049Application Date: 2013-05-17
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Publication No.: US09436637B2Publication Date: 2016-09-06
- Inventor: Sudarshanam Kommanaboyina
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Volpe and Koenig, P.C.
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G06F15/173
Abstract:
A system and method embodying some aspects for communicating between nodes in a network-on-chip are provided. The system comprises a microprocessing chip and a plurality of connection paths. The microprocessing chip comprises sixteen processing nodes disposed on the chip. The plurality of connection paths are configured such that each is at most three hops away from any other node. Each node also has connection paths to at most three other nodes.
Public/Granted literature
- US20140344501A1 NETWORK-ON-CHIP ARCHITECTURE FOR MULTI-PROCESSOR SOC DESIGNS Public/Granted day:2014-11-20
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