Invention Grant
- Patent Title: Method for manufacturing semiconductor device using a gettering layer
- Patent Title (中): 使用吸气层制造半导体器件的方法
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Application No.: US14537279Application Date: 2014-11-10
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Publication No.: US09385210B2Publication Date: 2016-07-05
- Inventor: Hiroki Wakimoto
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-Shi
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-Shi
- Agency: Rabin & Berdo, P.C.
- Priority: JP2012-183093 20120822
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/322 ; H01L29/78 ; H01L29/40 ; H01L29/739 ; H01L29/06 ; H01L21/02

Abstract:
In a method for manufacturing a reverse blocking MOS semiconductor device, a gettering polysilicon layer is formed on a rear surface of an FZ silicon substrate. Then, a p+ isolation layer for obtaining a reverse voltage blocking capability is formed. A front surface structure including a MOS gate structure is formed on a front surface of the FZ silicon substrate. The rear surface of the FZ silicon substrate is ground to reduce the thickness of the FZ silicon substrate. The gettering polysilicon layer is formed with such a thickness that it remains, without being vanished by single crystallization, until a process for forming the front surface structure including the MOS gate structure ends. Therefore, it is possible to sufficiently maintain the gettering function of the gettering polysilicon layer even in a heat treatment process subsequent to an isolation diffusion process.
Public/Granted literature
- US20150064852A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2015-03-05
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