Invention Grant
US09385162B2 Programmably reversible resistive device cells using CMOS logic processes
有权
使用CMOS逻辑工艺可编程的可逆电阻器件单元
- Patent Title: Programmably reversible resistive device cells using CMOS logic processes
- Patent Title (中): 使用CMOS逻辑工艺可编程的可逆电阻器件单元
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Application No.: US14507691Application Date: 2014-10-06
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Publication No.: US09385162B2Publication Date: 2016-07-05
- Inventor: Shine C. Chung
- Applicant: Shine C. Chung
- Main IPC: G11C11/00
- IPC: G11C11/00 ; H01L27/24 ; G11C11/16 ; G11C13/00 ; G11C17/16 ; H01L27/22 ; H01L29/78 ; H01L45/00

Abstract:
Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for reversible resistive devices, such as PCM, RRAM, CBRAM, or other memory cells. The reversible resistive devices have a reversible resistive element coupled to a diode. The diode can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diode. By applying a voltage or a current between a reversible resistive element and the N terminal of a diode, the reversible resistive device can be programmed into different states based on magnitude, duration, voltage-limit, or current-limit in a reversible manner. The P+ active region of the diode can be isolated from the N+ active region in the N well by using dummy MOS gate, SBL, or STI/LOCOS isolations.
Public/Granted literature
- US20150021543A1 Programmably Reversible Resistive Device Cells Using CMOS Logic Processes Public/Granted day:2015-01-22
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