Invention Grant
- Patent Title: Voids in STI regions for forming bulk FinFETs
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Application No.: US14826977Application Date: 2015-08-14
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Publication No.: US09385046B2Publication Date: 2016-07-05
- Inventor: Hung-Ming Chen , Feng Yuan , Tsung-Lin Lee , Chih Chieh Yeh
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/8234 ; H01L27/088 ; H01L29/06 ; H01L21/311 ; H01L21/762 ; H01L21/764 ; H01L21/84

Abstract:
An embodiment is an integrated circuit structure including two insulation regions over a substrate with one of the two insulation regions including a void, at least a bottom surface of the void being defined by the one of the two insulation regions. The integrated circuit structure further includes a first semiconductor strip between and adjoining the two insulation regions, where the first semiconductor strip includes a top portion forming a fin over top surfaces of the two insulation regions, a gate dielectric over a top surface and sidewalls of the fin, and a gate electrode over the gate dielectric.
Public/Granted literature
- US20150357247A1 Voids in STI Regions for Forming Bulk FinFETs Public/Granted day:2015-12-10
Information query
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