Invention Grant
- Patent Title: Electronic circuit, electronic apparatus, and authentication system
- Patent Title (中): 电子电路,电子仪器和认证系统
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Application No.: US14521616Application Date: 2014-10-23
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Publication No.: US09384682B2Publication Date: 2016-07-05
- Inventor: Dai Yamamoto , Masahiko Takenaka
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2013-246421 20131128
- Main IPC: H04L9/08
- IPC: H04L9/08 ; G09C1/00 ; H03K3/037

Abstract:
An electronic circuit includes: a plurality of RS latch circuits each configured to enter a metastable state in accordance with a clock signal input to the RS latch circuit; a determination circuit configured to determine whether an output of each of the RS latch circuits is a random number or a fixed number; and a selector configured to select whether to maintain the clock signal input to the RS latch circuit, to change the clock signal input to the RS latch circuit to another clock signal having a different frequency, or to input a clock signal for fixing a signal output from the RS latch circuit, as the clock signal input to the RS latch circuit, in accordance with a result determined by the determination circuit.
Public/Granted literature
- US20150146869A1 ELECTRONIC CIRCUIT, ELECTRONIC APPARATUS, AND AUTHENTICATION SYSTEM Public/Granted day:2015-05-28
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