Invention Grant
- Patent Title: Stitch and trim methods for double patterning compliant standard cell design
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Application No.: US13970636Application Date: 2013-08-20
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Publication No.: US09384307B2Publication Date: 2016-07-05
- Inventor: Chin-Hsiung Hsu , Huang-Yu Chen , Chung-Hsing Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Agent Steven E. Koffs
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
A method for creating double patterning compliant integrated circuit layouts is disclosed. The method allows patterns to be assigned to different masks and stitched together during lithography. The method also allows portions of the pattern to be removed after the process.
Public/Granted literature
- US20130339911A1 STITCH AND TRIM METHODS FOR DOUBLE PATTERNING COMPLIANT STANDARD CELL DESIGN Public/Granted day:2013-12-19
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