Invention Grant
- Patent Title: Modulating germanium percentage in MOS devices
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Application No.: US14691435Application Date: 2015-04-20
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Publication No.: US09362360B2Publication Date: 2016-06-07
- Inventor: Tsz-Mei Kwok , Kun-Mu Li , Hsueh-Chang Sung , Chii-Horng Li , Tze-Liang Lee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/33
- IPC: H01L21/33 ; H01L29/08 ; H01L29/78 ; H01L29/66 ; H01L29/165 ; H01L27/088 ; H01L29/45 ; H01L29/40 ; H01L21/8234 ; H01L29/417 ; H01L21/285 ; H01L21/306 ; H01L21/3065 ; H01L21/308 ; H01L21/768

Abstract:
An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the opening is adjacent to the gate stack. A first silicon germanium region is disposed in the opening, wherein the first silicon germanium region has a first germanium percentage. A second silicon germanium region is overlying the first silicon germanium region, wherein the second silicon germanium region has a second germanium percentage higher than the first germanium percentage. A metal silicide region is over and in contact with the second silicon germanium region.
Public/Granted literature
- US20150228724A1 Modulating Germanium Percentage in MOS Devices Public/Granted day:2015-08-13
Information query
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