Invention Grant
- Patent Title: Manufacturing method for semiconductor devices
- Patent Title (中): 半导体器件的制造方法
-
Application No.: US14829619Application Date: 2015-08-18
-
Publication No.: US09362241B2Publication Date: 2016-06-07
- Inventor: Takaomi Nishi , Takehiko Saito , Katsuhiro Torii
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2014-174648 20140828
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/00 ; H01L23/528 ; H01L23/532

Abstract:
A manufacturing method for semiconductor devices includes the steps of forming an Ni/Au film that includes an Ni film and an Au film formed over the Ni film over a wiring that is coupled to each of a plurality of electrode pads formed over a principal surface of a semiconductor wafer and arranges each of the electrode pads at a different position, grinding a back surface of the semiconductor wafer, performing reduction treatment on a surface of the Ni/Au film, and forming a solder bump over the Ni/Au film. In the reduction treatment, respective processes of flux application, reflow soldering and cleaning are performed and the solder bump is bonded to the Ni/Au film after the reduction treatment has been completed. Thereby, bonding reliability in flip chip bonding of a semiconductor device is improved.
Public/Granted literature
- US20160064343A1 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICES Public/Granted day:2016-03-03
Information query
IPC分类: