Invention Grant
US09362226B2 Three-dimensional (3D) semiconductor devices and methods of fabricating 3D semiconductor devices
有权
三维(3D)半导体器件和制造3D半导体器件的方法
- Patent Title: Three-dimensional (3D) semiconductor devices and methods of fabricating 3D semiconductor devices
- Patent Title (中): 三维(3D)半导体器件和制造3D半导体器件的方法
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Application No.: US14637755Application Date: 2015-03-04
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Publication No.: US09362226B2Publication Date: 2016-06-07
- Inventor: Jaegoo Lee , Youngwoo Park
- Applicant: Jaegoo Lee , Youngwoo Park
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2014-0027243 20140307
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/40 ; H01L23/02 ; H01L23/528 ; H01L23/522 ; H01L27/115

Abstract:
A three-dimensional (3D) semiconductor device includes a stack of conductive layers spaced from each other in a vertical direction, the stack having a staircase-shaped section in a connection region, and ends of the conductive layers constituting treads of the staircase-shaped section, respectively. The 3D semiconductor device further includes buffer patterns disposed on and protruding above the respective ends of the conductive layers, an interconnection structure disposed above the stack and including conductive lines, and contact plugs extending vertically between the conductive lines and the buffer patterns and electrically connected to the conductive layers of the stack via the buffer patterns.
Public/Granted literature
- US20150255386A1 THREE-DIMENSIONAL (3D) SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING 3D SEMICONDUCTOR DEVICES Public/Granted day:2015-09-10
Information query
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