Invention Grant
- Patent Title: Method of patterning a metal gate of semiconductor device
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Application No.: US14673024Application Date: 2015-03-30
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Publication No.: US09362124B2Publication Date: 2016-06-07
- Inventor: Chien-Hao Chen , Shun Wu Lin , Chi-Chun Chen , Ryan Chia-Jen Chen , Yi-Hsing Chen , Matt Yeh , Donald Y. Chao , Kuo-Bin Huang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/28 ; H01L21/311 ; H01L21/3213 ; H01L29/40

Abstract:
Provided are methods of patterning metal gate structures including a high-k gate dielectric. In an embodiment, a soluble hard mask layer may be used to provide a masking element to pattern a metal gate. The soluble hard mask layer may be removed from the substrate by water or a photoresist developer. In an embodiment, a hard mask including a high-k dielectric is formed. In a further embodiment, a protection layer is formed underlying a photoresist pattern. The protection layer may protect one or more layers formed on the substrate from a photoresist stripping process.
Public/Granted literature
- US20150206755A1 METHOD OF PATTERNING A METAL GATE OF SEMICONDUCTOR DEVICE Public/Granted day:2015-07-23
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