A semiconductor memory device includes memory cells which are laminated on a semiconductor substrate and include charge storage layers and control gates, a plurality of word lines each of which is commonly connected to the control gates of a plurality of the memory cells, and a control unit which performs programming and verification of data in units of a page of memory cells. The control unit consecutively performs programming of data in two or more pages of memory cells connected to the same word line, and then consecutively performs verification of the data programmed in the two or more pages of memory cells connected to the same word line.