Invention Grant
- Patent Title: Method of producing multilayer circuit board
- Patent Title (中): 生产多层电路板的方法
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Application No.: US13494417Application Date: 2012-06-12
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Publication No.: US09332650B2Publication Date: 2016-05-03
- Inventor: Shingo Yoshioka , Hiroaki Fujiwara
- Applicant: Shingo Yoshioka , Hiroaki Fujiwara
- Applicant Address: JP Osaka
- Assignee: PANASONIC CORPORATION
- Current Assignee: PANASONIC CORPORATION
- Current Assignee Address: JP Osaka
- Agency: Greenblum & Bernstein, P.L.C.
- Priority: JP2008-118818 20080430; JP2008-193931 20080728; JP2008-217091 20080826; JP2008-246431 20080925
- Main IPC: H05K3/02
- IPC: H05K3/02 ; H05K3/18 ; H05K1/16 ; H05K3/10 ; H05K1/02 ; H05K1/11 ; H05K3/00 ; H05K3/38 ; H05K3/40 ; H05K3/46

Abstract:
The present invention relates to a method of producing a multilayer circuit board including: a film-forming step of forming a swellable resin film on the surface of an insulative substrate, a circuit groove-forming step of forming circuit grooves having a depth equal to or greater than the thickness of the swellable resin film on the external surface of the film, a catalyst-depositing step of depositing a plating catalyst or the precursor thereof on the surface of the circuit grooves and the surface of the swellable resin film, a film-separating step of swelling the swellable resin film with a particular liquid and then separating the swollen resin film from the insulative substrate surface, and a plating processing step of forming an electrolessly plated film only in the region where the plating catalyst or the plating catalyst formed from the plating catalyst precursor remains unseparated after separation of the film.
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