Invention Grant
- Patent Title: Semiconductor device manufacturing method and semiconductor device
- Patent Title (中): 半导体器件制造方法和半导体器件
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Application No.: US14360228Application Date: 2012-11-16
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Publication No.: US09331042B2Publication Date: 2016-05-03
- Inventor: Daisuke Sakurai , Kazuya Usirokawa
- Applicant: Panasonic Corporation
- Applicant Address: JP Osaka
- Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee Address: JP Osaka
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: JP2012-006630 20120117
- International Application: PCT/JP2012/007352 WO 20121116
- International Announcement: WO2013/108323 WO 20130725
- Main IPC: H01L23/488
- IPC: H01L23/488 ; H01L23/00

Abstract:
A plurality of protruding electrodes of a semiconductor chip are in contact with a plurality of electrodes formed on a semiconductor substrate, via a plurality of solder sections. In this state, the solder sections are melted so as to form a plurality of solder bonding sections joined to the protruding electrodes of the semiconductor chip and the electrodes of the semiconductor substrate. Moreover, a distance between a part of the semiconductor chip and the semiconductor substrate is larger than a distance between the other part of the semiconductor chip and the semiconductor substrate, extending at least some of the solder bonding sections. Thus, the solder bonding sections vary in height. Holes are then formed at least in a solder bonding section having a maximum height out of the solder bonding sections. After that, the solder bonding sections are solidified.
Public/Granted literature
- US20140299986A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE Public/Granted day:2014-10-09
Information query
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