Invention Grant
- Patent Title: Semiconductor device, test method thereof, and system
- Patent Title (中): 半导体器件,其测试方法和系统
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Application No.: US13012360Application Date: 2011-01-24
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Publication No.: US09330786B2Publication Date: 2016-05-03
- Inventor: Satoshi Uetake , Yuji Uo
- Applicant: Satoshi Uetake , Yuji Uo
- Applicant Address: LU Luxembourg
- Assignee: PS4 Luxco S.a.r.l.
- Current Assignee: PS4 Luxco S.a.r.l.
- Current Assignee Address: LU Luxembourg
- Priority: JP2010-016890 20100128
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G11C29/40 ; G11C5/04

Abstract:
A semiconductor device includes a plurality of chips comprising a plurality of I/O terminals connected in common via through electrodes. Each of the chips includes an I/O compression circuit operable to output a compression result obtained by compression of data of a plurality of internal data buses to a first I/O terminal of the plurality of I/O terminals. Each of the chips also includes a test control circuit having a register group that sets the number of the first I/O terminal. Setting information that assigns different first I/O terminals to different chips is set in the register group. Each of the chips inputs or outputs data with use of the number of the I/O terminal that is different from those in other chips. Thus, the I/O compression circuits can concurrently perform an I/O compression test in parallel in the plurality of chips without a bus fight.
Public/Granted literature
- US20110184688A1 SEMICONDUCTOR DEVICE, TEST METHOD THEREOF, AND SYSTEM Public/Granted day:2011-07-28
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