Invention Grant
US09305607B2 Logical memory architecture, in particular for MRAM, PCRAM, or RRAM
有权
逻辑内存架构,特别是MRAM,PCRAM或RRAM
- Patent Title: Logical memory architecture, in particular for MRAM, PCRAM, or RRAM
- Patent Title (中): 逻辑内存架构,特别是MRAM,PCRAM或RRAM
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Application No.: US14007017Application Date: 2012-03-23
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Publication No.: US09305607B2Publication Date: 2016-04-05
- Inventor: Weisheng Zhao , Sumanta Chaudhuri , Claude Chappert , Jacques-Olivier Klein
- Applicant: Weisheng Zhao , Sumanta Chaudhuri , Claude Chappert , Jacques-Olivier Klein
- Applicant Address: FR Orsay FR Paris
- Assignee: UNIVERSITE PARIS SUD 11,CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
- Current Assignee: UNIVERSITE PARIS SUD 11,CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
- Current Assignee Address: FR Orsay FR Paris
- Agency: Greer, Burns & Crain, Ltd.
- Priority: FR1152472 20110324
- International Application: PCT/FR2012/050617 WO 20120323
- International Announcement: WO2012/168591 WO 20121213
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C5/06 ; G11C11/16 ; G11C13/00

Abstract:
An architecture and method are provided for reading and writing, in parallel or in series, an electronic memory component based on a two-dimensional matrix of two-terminal binary memory unit cells built into a crossbar architecture. The component includes a logical column-selector located outside the matrix and activating at least one column, one or more cells of which are subjected to read or write processing. Also provided is a component and method with the reading of the status of the cells by differential detection on from two cells of two different rows, either between a storage column and a constant reference column, or between two rows or two storage columns. A component is also provided in which specific selection structure is exclusively dedicated to read operations, and/or in which complementary cells in two complementary columns connected together are encoded in a single atomic operation by means of a single write current.
Public/Granted literature
- US20140016390A1 LOGICAL MEMORY ARCHITECTURE, IN PARTICULAR FOR MRAM, PCRAM, OR RRAM Public/Granted day:2014-01-16
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