Invention Grant
US09305607B2 Logical memory architecture, in particular for MRAM, PCRAM, or RRAM 有权
逻辑内存架构,特别是MRAM,PCRAM或RRAM

Logical memory architecture, in particular for MRAM, PCRAM, or RRAM
Abstract:
An architecture and method are provided for reading and writing, in parallel or in series, an electronic memory component based on a two-dimensional matrix of two-terminal binary memory unit cells built into a crossbar architecture. The component includes a logical column-selector located outside the matrix and activating at least one column, one or more cells of which are subjected to read or write processing. Also provided is a component and method with the reading of the status of the cells by differential detection on from two cells of two different rows, either between a storage column and a constant reference column, or between two rows or two storage columns. A component is also provided in which specific selection structure is exclusively dedicated to read operations, and/or in which complementary cells in two complementary columns connected together are encoded in a single atomic operation by means of a single write current.
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