Provided herein are apparatus and methods for fast charge pump holdover on signal interruption. In certain configurations, a clock generator system includes a phase-locked loop (PLL), a fast detect circuit, and a switch electrically coupled to an input of the PLL's loop filter. The fast detect circuit relatively quickly detects when an input signal to the PLL is lost. The fast detect circuit can quickly detect the loss of phase lock and can place the PLL into a holdover such that the frequency of a clock signal generated by the PLL remains within an acceptable range.