Invention Grant
- Patent Title: Formation of electrical components on a semiconductor substrate by polishing to isolate the components
- Patent Title (中): 通过抛光在半导体衬底上形成电气部件以隔离部件
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Application No.: US14559602Application Date: 2014-12-03
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Publication No.: US09275992B1Publication Date: 2016-03-01
- Inventor: Marc L. Tarabbia , Shanjen Pan
- Applicant: Cirrus Logic, Inc.
- Applicant Address: US TX Austin
- Assignee: CIRRUS LOGIC, INC.
- Current Assignee: CIRRUS LOGIC, INC.
- Current Assignee Address: US TX Austin
- Agency: Norton Rose Fulbright US LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/06 ; H01L49/02

Abstract:
Trenches may be formed in layers on a semiconductor substrate for defining electrical components for an electronic device, such as an amplifier. A polishing step may be performed after formation of the trenches and deposition of other layer(s) to define regions for resistors, capacitors, or other elements in a metal layer on a semiconductor substrate. The polishing step may create discontinuities in metal layers on the semiconductor substrate that define electrically isolated regions corresponding to the resistors, capacitor, and other components of the electronic device.
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