Semiconductor device including gate channel having adjusted threshold voltage

Invention Grant

US09275908B2 Semiconductor device including gate channel having adjusted threshold voltage 有权

Title translation: 包括具有调节的阈值电压的栅极通道的半导体器

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Patent Title: Semiconductor device including gate channel having adjusted threshold voltage
Patent Title (中): 包括具有调节的阈值电压的栅极通道的半导体器
Application No.: US14729105

Application Date: 2015-06-03
Publication No.: US09275908B2

Publication Date: 2016-03-01
Inventor: Pranita Kerber , Qiqing C. Ouyang , Alexander Reznicek
Applicant: International Business Machines Corporation
Applicant Address: US NY Armonk
Assignee: International Business Machines Corporation
Current Assignee: International Business Machines Corporation
Current Assignee Address: US NY Armonk
Agency: Cantor Colburn LLP
Agent Daniel Morris
Main IPC: H01L21/8234
IPC: H01L21/8234 ; H01L21/8238 ; H01L27/092 ; H01L21/02 ; H01L29/66 ; H01L21/306

Semiconductor device including gate channel having adjusted threshold voltage

Abstract:

A semiconductor device includes at least one first semiconductor fin formed on an nFET region of a semiconductor device and at least one second semiconductor fin formed on a pFET region. The at least one first semiconductor fin has an nFET channel region interposed between a pair of nFET source/drain regions. The at least one second semiconductor fin has a pFET channel region interposed between a pair of pFET source/drain regions. The an epitaxial liner is formed on only the pFET channel region of the at least one second semiconductor fin such that a first threshold voltage of the nFET channel region is different than a second threshold voltage of the pFET channel.

Abstract(Chinese):

半导体器件包括形成在半导体器件的nFET区域上的至少一个第一半导体鳍片和形成在pFET区域上的至少一个第二半导体鳍片。所述至少一个第一半导体鳍片具有插入在一对nFET源极/漏极区域之间的nFET沟道区域。所述至少一个第二半导体鳍片具有插入在一对pFET源极/漏极区域之间的pFET沟道区域。外延衬垫仅形成在至少一个第二半导体鳍片的pFET沟道区上，使得nFET沟道区的第一阈值电压不同于pFET沟道的第二阈值电压。

Public/Granted literature

US20150318218A1 SEMICONDUCTOR DEVICE INCLUDING GATE CHANNEL HAVING ADJUSTED THRESHOLD VOLTAGE Public/Granted day:2015-11-05

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺