The invention provides a NAND-type semiconductor memory device capable of high speed operation. A semiconductor memory device of the invention includes: a memory array, which forms a plurality of memory cells arranged in a matrix direction; a vertical selecting mechanism, which couples to the memory array, and selects the memory cells in a vertical direction of the memory array according to a vertical address signal; a horizontal selecting mechanism, which couples to the memory array, and selects the memory cells in a horizontal direction of the memory array according to a horizontal address signal; and a controlling mechanism, which reads data from the memory cells or writes data into the memory cells. A plurality of cell units is disposed in the memory array. Each cell unit is consisted of a data memory cell which storages data and a reference memory cell which storages reference data.