Invention Grant
- Patent Title: Multi-processor with selectively interconnected memory units
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Application No.: US14458099Application Date: 2014-08-12
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Publication No.: US09274984B2Publication Date: 2016-03-01
- Inventor: Martin Vorbach
- Applicant: PACT XPP TECHNOLOGIES AG
- Applicant Address: DE Munich
- Assignee: PACT XPP TECHNOLOGIES AG
- Current Assignee: PACT XPP TECHNOLOGIES AG
- Current Assignee Address: DE Munich
- Agent Edward P. Heller, III
- Priority: DE10241812 20020906; DE10315295 20030404; DE10321834 20030515; EP03019428 20030828
- Main IPC: H03K19/173
- IPC: H03K19/173 ; G06F13/16 ; G06F15/78
Abstract:
A multi-processor having a plurality of data processing units and memory units has a bus system that selectively interconnects the processing units and the memory units.
Public/Granted literature
- US20140351482A1 Multi-processor with selectively interconnected memory units Public/Granted day:2014-11-27
Information query
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