Invention Grant
- Patent Title: Method for forming layout pattern
- Patent Title (中): 形成布局图案的方法
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Application No.: US14023472Application Date: 2013-09-11
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Publication No.: US09274413B2Publication Date: 2016-03-01
- Inventor: Yu-Cheng Tung
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L21/311
- IPC: H01L21/311 ; G03F1/38 ; H01L21/308
Abstract:
A method for forming a layout pattern includes the following processes. First, a first layout pattern consisting of mandrel patterns and dummy mandrel patterns, a second layout pattern consisting of geometric patterns, and a third layout pattern consisting of pad patterns and dummy pad patterns, are respectively defined on a first mask, a second mask, and a third mask. Then, the first layout pattern is transferred to form a first patterned layer. Afterwards, spacers having a first critical dimension are formed on the sidewalls of the first patterned layer so as to constitute loop-shaped patterns. Then, the third layout pattern is transferred to form a second patterned layer having a second critical dimension, wherein the second critical dimension is greater than the first critical dimension. Finally, the loop-shaped patterns, the pad patterns, and the dummy pad patterns are transferred into a target layer on the substrate.
Public/Granted literature
- US20150072531A1 METHOD FOR FORMING LAYOUT PATTERN Public/Granted day:2015-03-12
Information query
IPC分类:
