Invention Grant
US09253877B2 Wiring substrate and semiconductor device 有权
接线基板和半导体器件

Wiring substrate and semiconductor device
Abstract:
A wiring substrate includes wiring layers and insulation layers alternately stacked. Via holes are formed in the insulation layers. First via wirings are formed in the via holes to electrically connect the wiring layers to one another. Through holes extend through a lowermost one of the insulation layers in a thickness direction. The lowermost insulation layer covers a lowermost one of the wiring layers. Second via wirings are formed in the through holes to define an identification mark that is identifiable as a specific shape including a character, a symbol, or a combination thereof. A lower surface of each of the second via wirings is exposed from a lower surface of the lowermost insulation layer and is flush with a lower surface of the lowermost wiring layer.
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