Invention Grant
- Patent Title: Wiring substrate and semiconductor device
- Patent Title (中): 接线基板和半导体器件
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Application No.: US14633342Application Date: 2015-02-27
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Publication No.: US09253877B2Publication Date: 2016-02-02
- Inventor: Takashi Sato , Ruofan Tang
- Applicant: Shinko Electric Industries Co., Ltd.
- Applicant Address: JP Nagano-shi, Nagano-ken
- Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee Address: JP Nagano-shi, Nagano-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2014-046565 20140310
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L23/12 ; H05K1/02 ; H01L23/498 ; H05K1/11

Abstract:
A wiring substrate includes wiring layers and insulation layers alternately stacked. Via holes are formed in the insulation layers. First via wirings are formed in the via holes to electrically connect the wiring layers to one another. Through holes extend through a lowermost one of the insulation layers in a thickness direction. The lowermost insulation layer covers a lowermost one of the wiring layers. Second via wirings are formed in the through holes to define an identification mark that is identifiable as a specific shape including a character, a symbol, or a combination thereof. A lower surface of each of the second via wirings is exposed from a lower surface of the lowermost insulation layer and is flush with a lower surface of the lowermost wiring layer.
Public/Granted literature
- US20150257256A1 Wiring Substrate and Semiconductor Device Public/Granted day:2015-09-10
Information query
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