Invention Grant
- Patent Title: Multi-chip package and method of manufacturing the same
- Patent Title (中): 多芯片封装及制造方法相同
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Application No.: US14505802Application Date: 2014-10-03
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Publication No.: US09252123B2Publication Date: 2016-02-02
- Inventor: Won-Gil Han , Se-Yeoul Park , Ho-Tae Jin , Byong-Joo Kim , Yong-Je Lee , Han-Ki Park
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Samsung-ro, Yeongtong-gu, Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Samsung-ro, Yeongtong-gu, Suwon-si
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2011-0106379 20111018
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/66 ; H01L25/065 ; H01L25/00

Abstract:
A multi-chip package may include a first semiconductor chip, a second semiconductor chip, a first stud bump, a first nail head bonding bump, a second stud bump, and a first conductive wire. The first semiconductor chip may have a first bonding pad. The second semiconductor chip may be stacked on the first semiconductor chip so the first bonding pad remains exposed. The second semiconductor chip may have a second bonding pad. The first stud bump may be formed on the first bonding pad. The first nail head bonding bump may be formed on the first stud bump, with one end of a first conductive wire formed between the two. The second stud bump may be formed on the second bonding pad, with another end of the first conductive wire formed between the two. An electrical connection test may be performed on each of the wire bonding processes.
Public/Granted literature
- US20150031149A1 MULTI-CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2015-01-29
Information query
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