Invention Grant
- Patent Title: Efficient reduction of read disturb errors
- Patent Title (中): 读取干扰误差有效降低
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Application No.: US14588397Application Date: 2014-12-31
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Publication No.: US09250991B2Publication Date: 2016-02-02
- Inventor: Holloway H. Frost , Charles J. Camp , Timothy J. Fisher , James A. Fuxa , Lance W. Shelton
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Locke Lord LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F11/07 ; G06F12/02 ; G06F11/10 ; G11C29/50

Abstract:
Methods and apparatuses for reduction of Read Disturb errors in a NAND FLASH memory system comprise a controller configured to organize FLASH memory devices into blocks, each block having a plurality of pages, and each page defining an individually addressable physical memory location. The controller is further configured to accumulate a Block READ Count corresponding to the number of times any pages in a first block of pages have been read since the first block was last erased. Once the READ count reaches a predetermined number, the controller responds to subsequent READ requests for pages within the first block by moving data associated with a requested page to a page in a second, different block without moving data associated with other pages in the first block, and modifying a logical-to-physical translation table to associate the moved data with the physical address of the page in the second block.
Public/Granted literature
- US20150113341A1 Efficient Reduction of Read Disturb Errors Public/Granted day:2015-04-23
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