Invention Grant
US09099461B2 Method of manufacturing scaled equivalent oxide thickness gate stacks in semiconductor devices and related design structure
有权
在半导体器件中制造尺寸等效的氧化物厚度栅极叠层的方法及相关设计结构
- Patent Title: Method of manufacturing scaled equivalent oxide thickness gate stacks in semiconductor devices and related design structure
- Patent Title (中): 在半导体器件中制造尺寸等效的氧化物厚度栅极叠层的方法及相关设计结构
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Application No.: US13490740Application Date: 2012-06-07
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Publication No.: US09099461B2Publication Date: 2015-08-04
- Inventor: Michael P. Chudzik , Min Dai , Jinping Liu , Paul A. Ronsheim , Joseph F. Shepard, Jr. , Shahab Siddiqui
- Applicant: Michael P. Chudzik , Min Dai , Jinping Liu , Paul A. Ronsheim , Joseph F. Shepard, Jr. , Shahab Siddiqui
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman Warnick LLC
- Agent Yuanmin Cai
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L29/51 ; H01L21/28
Abstract:
A method of forming a semiconductor device is disclosed. The method includes: forming a dielectric region on a substrate; annealing the dielectric region in an environment including ammonia (NH3); monitoring a nitrogen peak of at least one of the substrate and the dielectric region during the annealing; and adjusting a parameter of the environment based on the monitoring of the nitrogen peak.
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