Invention Grant
- Patent Title: Integrated circuit optimization
- Patent Title (中): 集成电路优化
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Application No.: US14194129Application Date: 2014-02-28
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Publication No.: US09098664B2Publication Date: 2015-08-04
- Inventor: Vivek Trivedi , Khalil Siddiqui
- Applicant: JUNIPER NETWORKS, INC.
- Applicant Address: US CA Sunnyvale
- Assignee: Juniper Networks, Inc.
- Current Assignee: Juniper Networks, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Harrity & Harrity, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A device may identify signal channels for connecting circuit blocks, where each circuit block is associated with a block implementation area corresponding to a substrate. The device may assign a channel priority to each of the signal channels based on at least one channel criteria. The device may allocate a channel implementation area, corresponding to the substrate, for each of a plurality of signal channels, based on the channel priority assigned to the signal channel and based on the block implementation areas. The device may generate an integrated circuit design comprising the channel implementation area allocated for each of the plurality of signal channels.
Public/Granted literature
- US20140181778A1 INTEGRATED CIRCUIT OPTIMIZATION Public/Granted day:2014-06-26
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