Invention Grant
- Patent Title: Asymmetric high-voltage JFET and manufacturing process
- Patent Title (中): 非对称高压JFET及制造工艺
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Application No.: US13359146Application Date: 2012-01-26
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Publication No.: US09076880B2Publication Date: 2015-07-07
- Inventor: Martin Knaipp , Georg Roehrer
- Applicant: Martin Knaipp , Georg Roehrer
- Applicant Address: AT Unterpremstaetten
- Assignee: ams AG
- Current Assignee: ams AG
- Current Assignee Address: AT Unterpremstaetten
- Agency: McDermott Will & Emery LLP
- Priority: DE102011009487 20110126
- Main IPC: H01L29/80
- IPC: H01L29/80 ; H01L21/337 ; H01L29/808 ; H01L29/06 ; H01L29/66
Abstract:
A high voltage JFET has a deep well of a first type of conductivity made in a semiconductor substrate, a further well of an opposite second type of conductivity arranged in the deep well, a shallow well of a first type of conductivity arranged in the further well, a first contact region for source and a second contact region for drain arranged in the further well, a third contact region for gate arranged between the first contact region and the second contact region in the shallow well, a first distance between the first contact region and the third contact region being smaller than a second distance between the second contact region and the third contact region, and an electrical connection between the first contact region and the second contact region via at least one channel region present between the deep well and the shallow well in the further well.
Public/Granted literature
- US20120187458A1 Asymmetric High-Voltage JFET and Manufacturing Process Public/Granted day:2012-07-26
Information query
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