Invention Grant
US09076867B2 Semiconductor device structures including strained transistor channels
有权
包括应变晶体管通道的半导体器件结构
- Patent Title: Semiconductor device structures including strained transistor channels
- Patent Title (中): 包括应变晶体管通道的半导体器件结构
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Application No.: US14188186Application Date: 2014-02-24
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Publication No.: US09076867B2Publication Date: 2015-07-07
- Inventor: Arup Bhattacharyya , Leonard Forbes , Paul A. Farrar
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L29/78
- IPC: H01L29/78 ; B82Y10/00 ; H01L21/265 ; H01L21/8238 ; H01L29/66

Abstract:
The present invention includes methods for stressing transistor channels of semiconductor device structures. Such methods include the formation of so-called near-surface “nanocavities” adjacent to the source/drain regions, forming extensions of the source/drain regions adjacent to and including the nanocavities, and implanting matter of a type that will expand or contract the volume of the nanocavities, depending respectively upon whether compressive strain is desirable in transistor channels between the nanocavities, as in PMOS field effect transistors, or tensile strain is wanted in transistor channels, as in NMOS field effect transistors, to enhance carrier mobility and transistor speed. Semiconductor device structures and semiconductor devices including these features are also disclosed.
Public/Granted literature
- US20140167186A1 SEMICONDUCTOR DEVICE STRUCTURES INCLUDING STRAINED TRANSISTOR CHANNELS Public/Granted day:2014-06-19
Information query
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