Invention Grant
- Patent Title: Integrated circuits with reduced voltage across gate dielectric and operating methods thereof
- Patent Title (中): 具有降低栅极电介质电压的集成电路及其操作方法
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Application No.: US13770496Application Date: 2013-02-19
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Publication No.: US09076858B2Publication Date: 2015-07-07
- Inventor: Chung-Hui Chen
- Applicant: Chung-Hui Chen
- Applicant Address: TW
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW
- Agency: Lowe Hauptman & Ham, LLP
- Main IPC: H03K5/08
- IPC: H03K5/08 ; H01L29/78 ; H01L25/00 ; H01L27/092

Abstract:
An integrated circuit includes a first pad configured to carry a signal, a first receiver having an input node, a second receiver having an input node, a first pass gate, and a second pass gate. The first pass gate is coupled between the first pad and the input node of the first receiver. The first pass gate is configured to be turned on when the signal on the first pad is greater than a first voltage level. The second pass gate is coupled between the first pad and the input node of the second receiver. The second pass gate is configured to be turned on when the signal on the first pad is less than a second voltage level.
Public/Granted literature
- US20130162332A1 INTEGRATED CIRCUITS WITH REDUCED VOLTAGE ACROSS GATE DIELECTRIC AND OPERATING METHODS THEREOF Public/Granted day:2013-06-27
Information query
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