Patterning method for semiconductor device fabrication

Invention Grant

US09076736B2 Patterning method for semiconductor device fabrication 有权

Title translation: 半导体器件制造的图案化方法

Please log in to see more content

Patent Title: Patterning method for semiconductor device fabrication
Patent Title (中): 半导体器件制造的图案化方法
Application No.: US13828885

Application Date: 2013-03-14
Publication No.: US09076736B2

Publication Date: 2015-07-07
Inventor: Yen-Chun Huang , Ming-Feng Shieh , Chih-Ming Lai , Ken-Hsien Hsieh
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Applicant Address: TW Hsin-Chu
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
Current Assignee Address: TW Hsin-Chu
Agency: Haynes and Boone, LLP
Main IPC: H01L21/4763
IPC: H01L21/4763 ; H01L21/44 ; H01L21/308

Patterning method for semiconductor device fabrication

Abstract:

A method includes forming a first pattern having a first opening on a semiconductor substrate. The first opening is then filled. A second pattern of a first and second feature, interposed by the filled opening, is formed on the semiconductor substrate. Spacer elements then are formed on sidewalls of the filled opening, the first feature and the second feature. After forming the spacer elements, the material comprising first and second features is removed to form a second opening and a third opening. The filled opening, the second opening and the third opening are used as a masking element to etch a target layer of the substrate.

Abstract(Chinese):

一种方法包括在半导体衬底上形成具有第一开口的第一图案。然后第一个开口填满。在半导体衬底上形成第一和第二特征的第二图形，插入填充的开口。然后，间隔元件形成在填充开口的侧壁上，第一特征和第二特征。在形成间隔元件之后，除去包括第一和第二特征的材料以形成第二开口和第三开口。填充的开口，第二开口和第三开口用作掩模元件以蚀刻基板的目标层。

Public/Granted literature

US20140273468A1 PATTERNING METHOD FOR SEMICONDUCTOR DEVICE FABRICATION Public/Granted day:2014-09-18

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/34	...具有H01L21/06，H01L21/16及H01L21/18各组不包含的或有或无杂质，例如掺杂材料的半导体的器件
H01L21/46	....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/44）
H01L21/461	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/4763	......非绝缘层的沉积，例如绝缘层上的导电层、电阻层；这些层的后处理（电极的制造入H01L21/28）