Invention Grant
US09054155B2 Semiconductor dies having substrate shunts and related fabrication methods
有权
具有衬底分流器和相关制造方法的半导体管芯
- Patent Title: Semiconductor dies having substrate shunts and related fabrication methods
- Patent Title (中): 具有衬底分流器和相关制造方法的半导体管芯
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Application No.: US13789340Application Date: 2013-03-07
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Publication No.: US09054155B2Publication Date: 2015-06-09
- Inventor: Chai Ean Gill , Wen-Yi Chen
- Applicant: Chai Ean Gill , Wen-Yi Chen
- Applicant Address: US TX Austin
- Assignee: FREESCALE SEMICONDUCTOR INC.
- Current Assignee: FREESCALE SEMICONDUCTOR INC.
- Current Assignee Address: US TX Austin
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L21/76 ; H01L21/761

Abstract:
Die structures for electronic device packages and related fabrication methods are provided. An exemplary die structure includes a substrate having a first layer of semiconductor material including a semiconductor device formed thereon, a handle layer of semiconductor material, and a buried layer of dielectric material between the handle layer and the first layer. The die structure also includes a plurality of shunting regions in the first layer of semiconductor material, wherein each shunting region includes a doped region in the first layer that is electrically connected to the handle layer of semiconductor material, and a body region underlying the doped region that is contiguous with at least a portion of the first layer underlying a semiconductor device.
Public/Granted literature
- US20140252552A1 SEMICONDUCTOR DIES HAVING SUBSTRATE SHUNTS AND RELATED FABRICATION METHODS Public/Granted day:2014-09-11
Information query
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