Invention Grant
- Patent Title: Method for manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US14194874Application Date: 2014-03-03
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Publication No.: US09053954B2Publication Date: 2015-06-09
- Inventor: Bunji Yasumura , Yoshinori Deguchi , Fumikazu Takei , Akio Hasebe , Naohiro Makihira , Mitsuyuki Kubo
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: Miles & Stockbridge P.C.
- Priority: JP2013-061088 20130322
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L25/065 ; H01L23/544 ; H01L21/66

Abstract:
To improve the assemblability of a semiconductor device.When a memory chip is mounted over a logic chip, a recognition range including a recognition mark formed at a back surface of the logic chip is imaged and a shape of the recognition range is recognized, alignment of a plurality of bumps of the logic chip and a plurality of projection electrodes of the above-described memory chip is performed based on a result of the recognition, and the above-described memory chip is mounted over the logic chip. At this time, the shape of the recognition range is different from any portion of an array shape of the bumps, as a result, the recognition mark in the shape of the recognition range can be reliably recognized, and alignment of the bumps of the logic chip and the projection electrodes of the above-described memory chip is performed with high accuracy.
Public/Granted literature
- US20140287541A1 SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE Public/Granted day:2014-09-25
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